/** @file
  This file provides GPIO topology for MTL_PCH_S PCH.

  Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
  SPDX-License-Identifier: BSD-2-Clause-Patent

**/

#include <Register/GpioV2ChipsetId.h>
#include <Register/GpioV2MtlPchSRegs.h>
#include <Include/GpioV2PinsMtlPchS.h>
#include <GpioV2Pad.h>
#include <GpioV2ControllerInterface.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/PciSegmentLib.h>
#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/BootloaderCommonLib.h>
#include <Library/DebugLib.h>

//
// Pads for Community 0, Group GPP_D (0)
//
GPIOV2_PAD MtlPchSPch0Community0Group0Pads[] = {
  GPIOV2_MTL_PCH_S_GPP_D_0,
  GPIOV2_MTL_PCH_S_GPP_D_1,
  GPIOV2_MTL_PCH_S_GPP_D_2,
  GPIOV2_MTL_PCH_S_GPP_D_3,
  GPIOV2_MTL_PCH_S_GPP_D_4,
  GPIOV2_MTL_PCH_S_GPP_D_5,
  GPIOV2_MTL_PCH_S_GPP_D_6,
  GPIOV2_MTL_PCH_S_GPP_D_7,
  GPIOV2_MTL_PCH_S_GPP_D_8,
  GPIOV2_MTL_PCH_S_GPP_D_9,
  GPIOV2_MTL_PCH_S_GPP_D_10,
  GPIOV2_MTL_PCH_S_GPP_D_11,
  GPIOV2_MTL_PCH_S_GPP_D_12,
  GPIOV2_MTL_PCH_S_GPP_D_13,
  GPIOV2_MTL_PCH_S_GPP_D_14,
  GPIOV2_MTL_PCH_S_GPP_D_15,
  GPIOV2_MTL_PCH_S_GPP_D_16,
  GPIOV2_MTL_PCH_S_GPP_D_17,
  GPIOV2_MTL_PCH_S_GPP_D_18,
  GPIOV2_MTL_PCH_S_GPP_D_19,
  GPIOV2_MTL_PCH_S_GPP_D_20,
  GPIOV2_MTL_PCH_S_GPP_D_21,
  GPIOV2_MTL_PCH_S_GPP_D_22,
  GPIOV2_MTL_PCH_S_GPP_D_23,
  GPIOV2_MTL_PCH_S_GSPI3_THC1_CLK_LOOPBK
};

//
// Pads for Community 0, Group GPP_R (1)
//
GPIOV2_PAD MtlPchSPch0Community0Group1Pads[] = {
  GPIOV2_MTL_PCH_S_GPP_R_0,
  GPIOV2_MTL_PCH_S_GPP_R_1,
  GPIOV2_MTL_PCH_S_GPP_R_2,
  GPIOV2_MTL_PCH_S_GPP_R_3,
  GPIOV2_MTL_PCH_S_GPP_R_4,
  GPIOV2_MTL_PCH_S_GPP_R_5,
  GPIOV2_MTL_PCH_S_GPP_R_6,
  GPIOV2_MTL_PCH_S_GPP_R_7,
  GPIOV2_MTL_PCH_S_GPP_R_8,
  GPIOV2_MTL_PCH_S_GPP_R_9,
  GPIOV2_MTL_PCH_S_GPP_R_10,
  GPIOV2_MTL_PCH_S_GPP_R_11,
  GPIOV2_MTL_PCH_S_GPP_R_12,
  GPIOV2_MTL_PCH_S_GSPI2_CLK_LOOPBK
};

//
// Pads for Community 0, Group GPP_J (2)
//
GPIOV2_PAD MtlPchSPch0Community0Group2Pads[] = {
  GPIOV2_MTL_PCH_S_GPP_J_0,
  GPIOV2_MTL_PCH_S_GPP_J_1,
  GPIOV2_MTL_PCH_S_GPP_J_2,
  GPIOV2_MTL_PCH_S_GPP_J_3,
  GPIOV2_MTL_PCH_S_GPP_J_4,
  GPIOV2_MTL_PCH_S_GPP_J_5,
  GPIOV2_MTL_PCH_S_GPP_J_6,
  GPIOV2_MTL_PCH_S_GPP_J_7,
  GPIOV2_MTL_PCH_S_GPP_J_8,
  GPIOV2_MTL_PCH_S_GPP_J_9,
  GPIOV2_MTL_PCH_S_GPP_J_10,
  GPIOV2_MTL_PCH_S_GPP_J_11,
  GPIOV2_MTL_PCH_S_GPP_J_12,
  GPIOV2_MTL_PCH_S_GPP_J_13,
  GPIOV2_MTL_PCH_S_GPP_J_14,
  GPIOV2_MTL_PCH_S_GPP_J_15,
  GPIOV2_MTL_PCH_S_GPP_J_16,
  GPIOV2_MTL_PCH_S_RESET_SYNCB
};

//
// Pads for Community 0, Group vGPIO (3)
//
GPIOV2_PAD MtlPchSPch0Community0Group3Pads[] = {
  GPIOV2_MTL_PCH_S_VGPIO_0,
  GPIOV2_MTL_PCH_S_VGPIO_4,
  GPIOV2_MTL_PCH_S_VGPIO_5,
  GPIOV2_MTL_PCH_S_VGPIO_6,
  GPIOV2_MTL_PCH_S_VGPIO_7,
  GPIOV2_MTL_PCH_S_VGPIO_8,
  GPIOV2_MTL_PCH_S_VGPIO_9,
  GPIOV2_MTL_PCH_S_VGPIO_10,
  GPIOV2_MTL_PCH_S_VGPIO_11,
  GPIOV2_MTL_PCH_S_VGPIO_12,
  GPIOV2_MTL_PCH_S_VGPIO_13,
  GPIOV2_MTL_PCH_S_VGPIO_18,
  GPIOV2_MTL_PCH_S_VGPIO_19,
  GPIOV2_MTL_PCH_S_VGPIO_20,
  GPIOV2_MTL_PCH_S_VGPIO_21,
  GPIOV2_MTL_PCH_S_VGPIO_22,
  GPIOV2_MTL_PCH_S_VGPIO_23,
  GPIOV2_MTL_PCH_S_VGPIO_24,
  GPIOV2_MTL_PCH_S_VGPIO_25,
  GPIOV2_MTL_PCH_S_VGPIO_30,
  GPIOV2_MTL_PCH_S_VGPIO_31,
  GPIOV2_MTL_PCH_S_VGPIO_32,
  GPIOV2_MTL_PCH_S_VGPIO_33,
  GPIOV2_MTL_PCH_S_VGPIO_34,
  GPIOV2_MTL_PCH_S_VGPIO_35,
  GPIOV2_MTL_PCH_S_VGPIO_36,
  GPIOV2_MTL_PCH_S_VGPIO_37,
  GPIOV2_MTL_PCH_S_VGPIO_THC0,
  GPIOV2_MTL_PCH_S_VGPIO_THC1,
  GPIOV2_MTL_PCH_S_VGPIO_THC2,
  GPIOV2_MTL_PCH_S_VGPIO_THC3
};

//
// Groups for Community 0
//
GPIOV2_GROUP MtlPchSPch0Community0Groups[] = {
  {
    // Group: GPP_D
    .Name = "GPP_D",
    .GpioPadGroup = GPIOV2_MTL_PCH_S_GROUP_D,
    .GroupToGpeMapping = { V_GPIOV2_MTL_PCH_S_PMC_PWRM_GPIO_CFG_GPP_D, V_GPIOV2_MTL_PCH_S_PCR_MISCCFG_GPE0_GPP_D },
    .RegisterOffsets = { R_GPIOV2_MTL_PCH_S_PCR_GPP_D_PAD_OWN, R_GPIOV2_MTL_PCH_S_PCR_GPP_D_PADCFGLOCK, R_GPIOV2_MTL_PCH_S_PCR_GPP_D_PADCFGLOCKTX, R_GPIOV2_MTL_PCH_S_PCR_GPP_D_HOSTSW_OWN, R_GPIOV2_MTL_PCH_S_PCR_GPP_D_GPI_IS, R_GPIOV2_MTL_PCH_S_PCR_GPP_D_GPI_IE, R_GPIOV2_MTL_PCH_S_PCR_GPP_D_GPI_GPE_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_D_GPI_GPE_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_D_SMI_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_D_SMI_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_D_NMI_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_D_NMI_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_D_PAD_CFG_DW0 },
    .PadsNum = sizeof (MtlPchSPch0Community0Group0Pads) / sizeof (GPIOV2_PAD),
    .Pads = MtlPchSPch0Community0Group0Pads
  },
  {
    // Group: GPP_R
    .Name = "GPP_R",
    .GpioPadGroup = GPIOV2_MTL_PCH_S_GROUP_R,
    .GroupToGpeMapping = { V_GPIOV2_MTL_PCH_S_PMC_PWRM_GPIO_CFG_GPP_R, V_GPIOV2_MTL_PCH_S_PCR_MISCCFG_GPE0_GPP_R },
    .RegisterOffsets = { R_GPIOV2_MTL_PCH_S_PCR_GPP_R_PAD_OWN, R_GPIOV2_MTL_PCH_S_PCR_GPP_R_PADCFGLOCK, R_GPIOV2_MTL_PCH_S_PCR_GPP_R_PADCFGLOCKTX, R_GPIOV2_MTL_PCH_S_PCR_GPP_R_HOSTSW_OWN, R_GPIOV2_MTL_PCH_S_PCR_GPP_R_GPI_IS, R_GPIOV2_MTL_PCH_S_PCR_GPP_R_GPI_IE, R_GPIOV2_MTL_PCH_S_PCR_GPP_R_GPI_GPE_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_R_GPI_GPE_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_R_SMI_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_R_SMI_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_R_NMI_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_R_NMI_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_R_PAD_CFG_DW0 },
    .PadsNum = sizeof (MtlPchSPch0Community0Group1Pads) / sizeof (GPIOV2_PAD),
    .Pads = MtlPchSPch0Community0Group1Pads
  },
  {
    // Group: GPP_J
    .Name = "GPP_J",
    .GpioPadGroup = GPIOV2_MTL_PCH_S_GROUP_J,
    .GroupToGpeMapping = { V_GPIOV2_MTL_PCH_S_PMC_PWRM_GPIO_CFG_GPP_J, V_GPIOV2_MTL_PCH_S_PCR_MISCCFG_GPE0_GPP_J },
    .RegisterOffsets = { R_GPIOV2_MTL_PCH_S_PCR_GPP_J_PAD_OWN, R_GPIOV2_MTL_PCH_S_PCR_GPP_J_PADCFGLOCK, R_GPIOV2_MTL_PCH_S_PCR_GPP_J_PADCFGLOCKTX, R_GPIOV2_MTL_PCH_S_PCR_GPP_J_HOSTSW_OWN, R_GPIOV2_MTL_PCH_S_PCR_GPP_J_GPI_IS, R_GPIOV2_MTL_PCH_S_PCR_GPP_J_GPI_IE, R_GPIOV2_MTL_PCH_S_PCR_GPP_J_GPI_GPE_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_J_GPI_GPE_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_J_SMI_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_J_SMI_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_J_NMI_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_J_NMI_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_J_PAD_CFG_DW0 },
    .PadsNum = sizeof (MtlPchSPch0Community0Group2Pads) / sizeof (GPIOV2_PAD),
    .Pads = MtlPchSPch0Community0Group2Pads
  },
  {
    // Group: vGPIO
    .Name = "vGPIO",
    .GpioPadGroup = GPIOV2_MTL_PCH_S_GROUP_VGPIO,
    .GroupToGpeMapping = { V_GPIOV2_MTL_PCH_S_PMC_PWRM_GPIO_CFG_VGPIO, V_GPIOV2_MTL_PCH_S_PCR_MISCCFG_GPE0_VGPIO },
    .RegisterOffsets = { R_GPIOV2_MTL_PCH_S_PCR_VGPIO_PAD_OWN, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_PADCFGLOCK, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_PADCFGLOCKTX, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_HOSTSW_OWN, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_GPI_IS, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_GPI_IE, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_GPI_GPE_STS, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_GPI_GPE_EN, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_SMI_STS, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_SMI_EN, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_NMI_STS, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_NMI_EN, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_PAD_CFG_DW0 },
    .PadsNum = sizeof (MtlPchSPch0Community0Group3Pads) / sizeof (GPIOV2_PAD),
    .Pads = MtlPchSPch0Community0Group3Pads
  }
};

//
// Pads for Community 1, Group GPP_A (0)
//
GPIOV2_PAD MtlPchSPch0Community1Group0Pads[] = {
  GPIOV2_MTL_PCH_S_GPP_A_0,
  GPIOV2_MTL_PCH_S_GPP_A_1,
  GPIOV2_MTL_PCH_S_GPP_A_2,
  GPIOV2_MTL_PCH_S_GPP_A_3,
  GPIOV2_MTL_PCH_S_GPP_A_4,
  GPIOV2_MTL_PCH_S_GPP_A_5,
  GPIOV2_MTL_PCH_S_GPP_A_6,
  GPIOV2_MTL_PCH_S_GPP_A_7,
  GPIOV2_MTL_PCH_S_GPP_A_8,
  GPIOV2_MTL_PCH_S_GPP_A_9,
  GPIOV2_MTL_PCH_S_GPP_A_10,
  GPIOV2_MTL_PCH_S_GPP_A_11,
  GPIOV2_MTL_PCH_S_GPP_A_12,
  GPIOV2_MTL_PCH_S_GPP_A_13,
  GPIOV2_MTL_PCH_S_ESPI_CLK_LOOPBK
};

//
// Pads for Community 1, Group DIR_ESPI (1)
//
GPIOV2_PAD MtlPchSPch0Community1Group1Pads[] = {
  GPIOV2_MTL_PCH_S_PWRBTNB_OUT,
  GPIOV2_MTL_PCH_S_DMI_PERSTB,
  GPIOV2_MTL_PCH_S_DMI_CLKREQB,
  GPIOV2_MTL_PCH_S_DIR_ESPI_IO_0,
  GPIOV2_MTL_PCH_S_DIR_ESPI_IO_1,
  GPIOV2_MTL_PCH_S_DIR_ESPI_IO_2,
  GPIOV2_MTL_PCH_S_DIR_ESPI_IO_3,
  GPIOV2_MTL_PCH_S_DIR_ESPI_CSB,
  GPIOV2_MTL_PCH_S_DIR_ESPI_RESETB,
  GPIOV2_MTL_PCH_S_DIR_ESPI_CLK,
  GPIOV2_MTL_PCH_S_DIR_ESPI_RCLK,
  GPIOV2_MTL_PCH_S_DIR_ESPI_ALERTB
};

//
// Pads for Community 1, Group GPP_B (2)
//
GPIOV2_PAD MtlPchSPch0Community1Group2Pads[] = {
  GPIOV2_MTL_PCH_S_GPP_B_0,
  GPIOV2_MTL_PCH_S_GPP_B_1,
  GPIOV2_MTL_PCH_S_GPP_B_2,
  GPIOV2_MTL_PCH_S_GPP_B_3,
  GPIOV2_MTL_PCH_S_GPP_B_4,
  GPIOV2_MTL_PCH_S_GPP_B_5,
  GPIOV2_MTL_PCH_S_GPP_B_6,
  GPIOV2_MTL_PCH_S_GPP_B_7,
  GPIOV2_MTL_PCH_S_GPP_B_8,
  GPIOV2_MTL_PCH_S_GPP_B_9,
  GPIOV2_MTL_PCH_S_GPP_B_10,
  GPIOV2_MTL_PCH_S_GPP_B_11,
  GPIOV2_MTL_PCH_S_GPP_B_12,
  GPIOV2_MTL_PCH_S_GPP_B_13,
  GPIOV2_MTL_PCH_S_GPP_B_14,
  GPIOV2_MTL_PCH_S_GPP_B_15,
  GPIOV2_MTL_PCH_S_GPP_B_16,
  GPIOV2_MTL_PCH_S_GPP_B_17,
  GPIOV2_MTL_PCH_S_GPP_B_18,
  GPIOV2_MTL_PCH_S_GPP_B_19,
  GPIOV2_MTL_PCH_S_GPP_B_20,
  GPIOV2_MTL_PCH_S_GPP_B_21
};

//
// Groups for Community 1
//
GPIOV2_GROUP MtlPchSPch0Community1Groups[] = {
  {
   // Group: GPP_A
    .Name = "GPP_A",
    .GpioPadGroup = GPIOV2_MTL_PCH_S_GROUP_A,
    .GroupToGpeMapping = { V_GPIOV2_MTL_PCH_S_PMC_PWRM_GPIO_CFG_GPP_A, V_GPIOV2_MTL_PCH_S_PCR_MISCCFG_GPE0_GPP_A },
    .RegisterOffsets = { R_GPIOV2_MTL_PCH_S_PCR_GPP_A_PAD_OWN, R_GPIOV2_MTL_PCH_S_PCR_GPP_A_PADCFGLOCK, R_GPIOV2_MTL_PCH_S_PCR_GPP_A_PADCFGLOCKTX, R_GPIOV2_MTL_PCH_S_PCR_GPP_A_HOSTSW_OWN, R_GPIOV2_MTL_PCH_S_PCR_GPP_A_GPI_IS, R_GPIOV2_MTL_PCH_S_PCR_GPP_A_GPI_IE, R_GPIOV2_MTL_PCH_S_PCR_GPP_A_GPI_GPE_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_A_GPI_GPE_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_A_SMI_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_A_SMI_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_A_NMI_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_A_NMI_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_A_PAD_CFG_DW0 },
    .PadsNum = sizeof (MtlPchSPch0Community1Group0Pads) / sizeof (GPIOV2_PAD),
    .Pads = MtlPchSPch0Community1Group0Pads
  },
  {
    // Group: DIR_ESPI
    .Name = "DIR_ESPI",
    .GpioPadGroup = GPIOV2_MTL_PCH_S_GROUP_DIR_ESPI,
    .RegisterOffsets = { R_GPIOV2_MTL_PCH_S_PCR_DIR_ESPI_PAD_OWN, R_GPIOV2_MTL_PCH_S_PCR_DIR_ESPI_PADCFGLOCK, R_GPIOV2_MTL_PCH_S_PCR_DIR_ESPI_PADCFGLOCKTX, R_GPIOV2_MTL_PCH_S_PCR_DIR_ESPI_HOSTSW_OWN, R_GPIOV2_MTL_PCH_S_PCR_DIR_ESPI_GPI_IS, R_GPIOV2_MTL_PCH_S_PCR_DIR_ESPI_GPI_IE, R_GPIOV2_MTL_PCH_S_PCR_DIR_ESPI_GPI_GPE_STS, R_GPIOV2_MTL_PCH_S_PCR_DIR_ESPI_GPI_GPE_EN, R_GPIOV2_MTL_PCH_S_PCR_DIR_ESPI_SMI_STS, R_GPIOV2_MTL_PCH_S_PCR_DIR_ESPI_SMI_EN, R_GPIOV2_MTL_PCH_S_PCR_DIR_ESPI_NMI_STS, R_GPIOV2_MTL_PCH_S_PCR_DIR_ESPI_NMI_EN, R_GPIOV2_MTL_PCH_S_PCR_DIR_ESPI_PAD_CFG_DW0 },
    .PadsNum = sizeof (MtlPchSPch0Community1Group1Pads) / sizeof (GPIOV2_PAD),
    .Pads = MtlPchSPch0Community1Group1Pads
  },
  {
    // Group: GPP_B
    .Name = "GPP_B",
    .GpioPadGroup = GPIOV2_MTL_PCH_S_GROUP_B,
    .GroupToGpeMapping = { V_GPIOV2_MTL_PCH_S_PMC_PWRM_GPIO_CFG_GPP_B, V_GPIOV2_MTL_PCH_S_PCR_MISCCFG_GPE0_GPP_B },
    .RegisterOffsets = { R_GPIOV2_MTL_PCH_S_PCR_GPP_B_PAD_OWN, R_GPIOV2_MTL_PCH_S_PCR_GPP_B_PADCFGLOCK, R_GPIOV2_MTL_PCH_S_PCR_GPP_B_PADCFGLOCKTX, R_GPIOV2_MTL_PCH_S_PCR_GPP_B_HOSTSW_OWN, R_GPIOV2_MTL_PCH_S_PCR_GPP_B_GPI_IS, R_GPIOV2_MTL_PCH_S_PCR_GPP_B_GPI_IE, R_GPIOV2_MTL_PCH_S_PCR_GPP_B_GPI_GPE_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_B_GPI_GPE_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_B_SMI_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_B_SMI_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_B_NMI_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_B_NMI_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_B_PAD_CFG_DW0 },
    .PadsNum = sizeof (MtlPchSPch0Community1Group2Pads) / sizeof (GPIOV2_PAD),
    .Pads = MtlPchSPch0Community1Group2Pads
  }
};

//
// Pads for Community 2, Group DSW (0)
//
GPIOV2_PAD MtlPchSPch0Community2Group0Pads[] = {
  GPIOV2_MTL_PCH_S_GPD_0,
  GPIOV2_MTL_PCH_S_GPD_1,
  GPIOV2_MTL_PCH_S_GPD_2,
  GPIOV2_MTL_PCH_S_GPD_3,
  GPIOV2_MTL_PCH_S_GPD_4,
  GPIOV2_MTL_PCH_S_GPD_5,
  GPIOV2_MTL_PCH_S_GPD_6,
  GPIOV2_MTL_PCH_S_GPD_7,
  GPIOV2_MTL_PCH_S_GPD_8,
  GPIOV2_MTL_PCH_S_GPD_9,
  GPIOV2_MTL_PCH_S_GPD_10,
  GPIOV2_MTL_PCH_S_GPD_11,
  GPIOV2_MTL_PCH_S_GPD_12,
  GPIOV2_MTL_PCH_S_SLP_LANB,
  GPIOV2_MTL_PCH_S_SLP_SUSB,
  GPIOV2_MTL_PCH_S_WAKEB,
  GPIOV2_MTL_PCH_S_DSW_SPARE
};

//
// Groups for Community 2
//
GPIOV2_GROUP MtlPchSPch0Community2Groups[] = {
  {
    // Group: DSW
    .Name = "DSW",
    .GpioPadGroup = GPIOV2_MTL_PCH_S_GROUP_DSW,
    .GroupToGpeMapping = { V_GPIOV2_MTL_PCH_S_PMC_PWRM_GPIO_CFG_DSW, V_GPIOV2_MTL_PCH_S_PCR_MISCCFG_GPE0_DSW },
    .RegisterOffsets = { R_GPIOV2_MTL_PCH_S_PCR_DSW_PAD_OWN, R_GPIOV2_MTL_PCH_S_PCR_DSW_PADCFGLOCK, R_GPIOV2_MTL_PCH_S_PCR_DSW_PADCFGLOCKTX, R_GPIOV2_MTL_PCH_S_PCR_DSW_HOSTSW_OWN, R_GPIOV2_MTL_PCH_S_PCR_DSW_GPI_IS, R_GPIOV2_MTL_PCH_S_PCR_DSW_GPI_IE, R_GPIOV2_MTL_PCH_S_PCR_DSW_GPI_GPE_STS, R_GPIOV2_MTL_PCH_S_PCR_DSW_GPI_GPE_EN, R_GPIOV2_MTL_PCH_S_PCR_DSW_SMI_STS, R_GPIOV2_MTL_PCH_S_PCR_DSW_SMI_EN, R_GPIOV2_MTL_PCH_S_PCR_DSW_NMI_STS, R_GPIOV2_MTL_PCH_S_PCR_DSW_NMI_EN, R_GPIOV2_MTL_PCH_S_PCR_DSW_PAD_CFG_DW0 },
    .PadsNum = sizeof (MtlPchSPch0Community2Group0Pads) / sizeof (GPIOV2_PAD),
    .Pads = MtlPchSPch0Community2Group0Pads
  }
};

//
// Pads for Community 3, Group SPI0 (0)
//
GPIOV2_PAD MtlPchSPch0Community3Group0Pads[] = {
  GPIOV2_MTL_PCH_S_SPI0_IO_2,
  GPIOV2_MTL_PCH_S_SPI0_IO_3,
  GPIOV2_MTL_PCH_S_SPI0_MOSI_IO_0,
  GPIOV2_MTL_PCH_S_SPI0_MISO_IO_1,
  GPIOV2_MTL_PCH_S_SPI0_TPM_CSB,
  GPIOV2_MTL_PCH_S_SPI0_FLASH_0_CSB,
  GPIOV2_MTL_PCH_S_SPI0_FLASH_1_CSB,
  GPIOV2_MTL_PCH_S_SPI0_CLK,
  GPIOV2_MTL_PCH_S_SPI0_CLK_LOOPBK
};

//
// Pads for Community 3, Group GPP_C (1)
//
GPIOV2_PAD MtlPchSPch0Community3Group1Pads[] = {
  GPIOV2_MTL_PCH_S_GPP_C_0,
  GPIOV2_MTL_PCH_S_GPP_C_1,
  GPIOV2_MTL_PCH_S_GPP_C_2,
  GPIOV2_MTL_PCH_S_GPP_C_3,
  GPIOV2_MTL_PCH_S_GPP_C_4,
  GPIOV2_MTL_PCH_S_GPP_C_5,
  GPIOV2_MTL_PCH_S_GPP_C_6,
  GPIOV2_MTL_PCH_S_GPP_C_7,
  GPIOV2_MTL_PCH_S_GPP_C_8,
  GPIOV2_MTL_PCH_S_GPP_C_9,
  GPIOV2_MTL_PCH_S_GPP_C_10,
  GPIOV2_MTL_PCH_S_GPP_C_11,
  GPIOV2_MTL_PCH_S_GPP_C_12,
  GPIOV2_MTL_PCH_S_GPP_C_13,
  GPIOV2_MTL_PCH_S_GPP_C_14,
  GPIOV2_MTL_PCH_S_GPP_C_15,
  GPIOV2_MTL_PCH_S_GPP_C_16,
  GPIOV2_MTL_PCH_S_GPP_C_17,
  GPIOV2_MTL_PCH_S_GPP_C_18,
  GPIOV2_MTL_PCH_S_GPP_C_19,
  GPIOV2_MTL_PCH_S_GPP_C_20,
  GPIOV2_MTL_PCH_S_GPP_C_21,
  GPIOV2_MTL_PCH_S_GPP_C_22,
  GPIOV2_MTL_PCH_S_GPP_C_23
};

//
// Pads for Community 3, Group GPP_H (2)
//
GPIOV2_PAD MtlPchSPch0Community3Group2Pads[] = {
  GPIOV2_MTL_PCH_S_GPP_H_0,
  GPIOV2_MTL_PCH_S_GPP_H_1,
  GPIOV2_MTL_PCH_S_GPP_H_2,
  GPIOV2_MTL_PCH_S_GPP_H_3,
  GPIOV2_MTL_PCH_S_GPP_H_4,
  GPIOV2_MTL_PCH_S_GPP_H_5,
  GPIOV2_MTL_PCH_S_GPP_H_6,
  GPIOV2_MTL_PCH_S_GPP_H_7,
  GPIOV2_MTL_PCH_S_GPP_H_8,
  GPIOV2_MTL_PCH_S_GPP_H_9,
  GPIOV2_MTL_PCH_S_GPP_H_10,
  GPIOV2_MTL_PCH_S_GPP_H_11,
  GPIOV2_MTL_PCH_S_GPP_H_12,
  GPIOV2_MTL_PCH_S_GPP_H_13,
  GPIOV2_MTL_PCH_S_GPP_H_14,
  GPIOV2_MTL_PCH_S_GPP_H_15,
  GPIOV2_MTL_PCH_S_GPP_H_16,
  GPIOV2_MTL_PCH_S_GPP_H_17,
  GPIOV2_MTL_PCH_S_GPP_H_18,
  GPIOV2_MTL_PCH_S_GPP_H_19
};

//
// Pads for Community 3, Group vGPIO_3 (3)
//
GPIOV2_PAD MtlPchSPch0Community3Group3Pads[] = {
  GPIOV2_MTL_PCH_S_VGPIO_PCIE_80,
  GPIOV2_MTL_PCH_S_VGPIO_PCIE_81,
  GPIOV2_MTL_PCH_S_VGPIO_PCIE_82,
  GPIOV2_MTL_PCH_S_VGPIO_PCIE_83
};

//
// Pads for Community 3, Group vGPIO_0 (4)
//
GPIOV2_PAD MtlPchSPch0Community3Group4Pads[] = {
  GPIOV2_MTL_PCH_S_VGPIO_USB_0,
  GPIOV2_MTL_PCH_S_VGPIO_USB_1,
  GPIOV2_MTL_PCH_S_VGPIO_USB_2,
  GPIOV2_MTL_PCH_S_VGPIO_USB_3,
  GPIOV2_MTL_PCH_S_VGPIO_USB_8,
  GPIOV2_MTL_PCH_S_VGPIO_USB_9,
  GPIOV2_MTL_PCH_S_VGPIO_USB_10,
  GPIOV2_MTL_PCH_S_VGPIO_USB_11
};

//
// Pads for Community 3, Group vGPIO_4 (5)
//
GPIOV2_PAD MtlPchSPch0Community3Group5Pads[] = {
  GPIOV2_MTL_PCH_S_VGPIO_ISCLK_0,
  GPIOV2_MTL_PCH_S_VGPIO_ISCLK_1,
  GPIOV2_MTL_PCH_S_VGPIO_SLPC_0,
  GPIOV2_MTL_PCH_S_VGPIO_SLPC_1,
  GPIOV2_MTL_PCH_S_VGPIO_SLPC_2,
  GPIOV2_MTL_PCH_S_VGPIO_SLPC_3,
  GPIOV2_MTL_PCH_S_VGPIO_SLPC_4,
  GPIOV2_MTL_PCH_S_VGPIO_SLPC_5,
  GPIOV2_MTL_PCH_S_VGPIO_SLPC_6,
  GPIOV2_MTL_PCH_S_VGPIO_SPARE_0,
  GPIOV2_MTL_PCH_S_VGPIO_SPARE_1,
  GPIOV2_MTL_PCH_S_VGPIO_SPARE_2,
  GPIOV2_MTL_PCH_S_VGPIO_SPARE_3,
  GPIOV2_MTL_PCH_S_VGPIO_SPARE_4,
  GPIOV2_MTL_PCH_S_VGPIO_SPARE_5,
  GPIOV2_MTL_PCH_S_VGPIO_SPARE_6,
  GPIOV2_MTL_PCH_S_VGPIO_SPARE_7,
  GPIOV2_MTL_PCH_S_VGPIO_SPARE_8,
  GPIOV2_MTL_PCH_S_VGPIO_SPARE_9,
  GPIOV2_MTL_PCH_S_VGPIO_SPARE_10,
  GPIOV2_MTL_PCH_S_VGPIO_SPARE_11,
  GPIOV2_MTL_PCH_S_VGPIO_SPARE_12,
  GPIOV2_MTL_PCH_S_VGPIO_SPARE_13,
  GPIOV2_MTL_PCH_S_VGPIO_SPARE_14,
  GPIOV2_MTL_PCH_S_VGPIO_SPARE_15,
  GPIOV2_MTL_PCH_S_VGPIO_SPARE_16,
  GPIOV2_MTL_PCH_S_VGPIO_SPARE_17,
  GPIOV2_MTL_PCH_S_VGPIO_SPARE_18,
  GPIOV2_MTL_PCH_S_VGPIO_SPARE_19,
  GPIOV2_MTL_PCH_S_VGPIO_SPARE_20,
  GPIOV2_MTL_PCH_S_VGPIO_SPARE_21
};

//
// Groups for Community 3
//
GPIOV2_GROUP MtlPchSPch0Community3Groups[] = {
  {
    // Group: SPI0
    .Name = "SPI0",
    .GpioPadGroup = GPIOV2_MTL_PCH_S_GROUP_SPI0,
    .RegisterOffsets = { R_GPIOV2_MTL_PCH_S_PCR_SPI0_PAD_OWN, R_GPIOV2_MTL_PCH_S_PCR_SPI0_PADCFGLOCK, R_GPIOV2_MTL_PCH_S_PCR_SPI0_PADCFGLOCKTX, R_GPIOV2_MTL_PCH_S_PCR_SPI0_HOSTSW_OWN, R_GPIOV2_MTL_PCH_S_PCR_SPI0_GPI_IS, R_GPIOV2_MTL_PCH_S_PCR_SPI0_GPI_IE, R_GPIOV2_MTL_PCH_S_PCR_SPI0_GPI_GPE_STS, R_GPIOV2_MTL_PCH_S_PCR_SPI0_GPI_GPE_EN, R_GPIOV2_MTL_PCH_S_PCR_SPI0_SMI_STS, R_GPIOV2_MTL_PCH_S_PCR_SPI0_SMI_EN, R_GPIOV2_MTL_PCH_S_PCR_SPI0_NMI_STS, R_GPIOV2_MTL_PCH_S_PCR_SPI0_NMI_EN, R_GPIOV2_MTL_PCH_S_PCR_SPI0_PAD_CFG_DW0 },
    .PadsNum = sizeof (MtlPchSPch0Community3Group0Pads) / sizeof (GPIOV2_PAD),
    .Pads = MtlPchSPch0Community3Group0Pads
  },
  {
    // Group: GPP_C
    .Name = "GPP_C",
    .GpioPadGroup = GPIOV2_MTL_PCH_S_GROUP_C,
    .GroupToGpeMapping = { V_GPIOV2_MTL_PCH_S_PMC_PWRM_GPIO_CFG_GPP_C, V_GPIOV2_MTL_PCH_S_PCR_MISCCFG_GPE0_GPP_C },
    .RegisterOffsets = { R_GPIOV2_MTL_PCH_S_PCR_GPP_C_PAD_OWN, R_GPIOV2_MTL_PCH_S_PCR_GPP_C_PADCFGLOCK, R_GPIOV2_MTL_PCH_S_PCR_GPP_C_PADCFGLOCKTX, R_GPIOV2_MTL_PCH_S_PCR_GPP_C_HOSTSW_OWN, R_GPIOV2_MTL_PCH_S_PCR_GPP_C_GPI_IS, R_GPIOV2_MTL_PCH_S_PCR_GPP_C_GPI_IE, R_GPIOV2_MTL_PCH_S_PCR_GPP_C_GPI_GPE_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_C_GPI_GPE_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_C_SMI_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_C_SMI_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_C_NMI_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_C_NMI_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_C_PAD_CFG_DW0 },
    .PadsNum = sizeof (MtlPchSPch0Community3Group1Pads) / sizeof (GPIOV2_PAD),
    .Pads = MtlPchSPch0Community3Group1Pads
  },
  {
    // Group: GPP_H
    .Name = "GPP_H",
    .GpioPadGroup = GPIOV2_MTL_PCH_S_GROUP_H,
    .GroupToGpeMapping = { V_GPIOV2_MTL_PCH_S_PMC_PWRM_GPIO_CFG_GPP_H, V_GPIOV2_MTL_PCH_S_PCR_MISCCFG_GPE0_GPP_H },
    .RegisterOffsets = { R_GPIOV2_MTL_PCH_S_PCR_GPP_H_PAD_OWN, R_GPIOV2_MTL_PCH_S_PCR_GPP_H_PADCFGLOCK, R_GPIOV2_MTL_PCH_S_PCR_GPP_H_PADCFGLOCKTX, R_GPIOV2_MTL_PCH_S_PCR_GPP_H_HOSTSW_OWN, R_GPIOV2_MTL_PCH_S_PCR_GPP_H_GPI_IS, R_GPIOV2_MTL_PCH_S_PCR_GPP_H_GPI_IE, R_GPIOV2_MTL_PCH_S_PCR_GPP_H_GPI_GPE_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_H_GPI_GPE_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_H_SMI_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_H_SMI_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_H_NMI_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_H_NMI_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_H_PAD_CFG_DW0 },
    .PadsNum = sizeof (MtlPchSPch0Community3Group2Pads) / sizeof (GPIOV2_PAD),
    .Pads = MtlPchSPch0Community3Group2Pads
  },
  {
    // Group: vGPIO_3
    .Name = "vGPIO_3",
    .GpioPadGroup = GPIOV2_MTL_PCH_S_GROUP_VGPIO_3,
    .RegisterOffsets = { R_GPIOV2_MTL_PCH_S_PCR_VGPIO_3_PAD_OWN, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_3_PADCFGLOCK, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_3_PADCFGLOCKTX, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_3_HOSTSW_OWN, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_3_GPI_IS, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_3_GPI_IE, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_3_GPI_GPE_STS, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_3_GPI_GPE_EN, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_3_SMI_STS, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_3_SMI_EN, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_3_NMI_STS, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_3_NMI_EN, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_3_PAD_CFG_DW0 },
    .PadsNum = sizeof (MtlPchSPch0Community3Group3Pads) / sizeof (GPIOV2_PAD),
    .Pads = MtlPchSPch0Community3Group3Pads
  },
  {
    // Group: vGPIO_0
    .Name = "vGPIO_0",
    .GpioPadGroup = GPIOV2_MTL_PCH_S_GROUP_VGPIO_0,
    .RegisterOffsets = { R_GPIOV2_MTL_PCH_S_PCR_VGPIO_0_PAD_OWN, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_0_PADCFGLOCK, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_0_PADCFGLOCKTX, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_0_HOSTSW_OWN, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_0_GPI_IS, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_0_GPI_IE, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_0_GPI_GPE_STS, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_0_GPI_GPE_EN, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_0_SMI_STS, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_0_SMI_EN, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_0_NMI_STS, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_0_NMI_EN, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_0_PAD_CFG_DW0 },
    .PadsNum = sizeof (MtlPchSPch0Community3Group4Pads) / sizeof (GPIOV2_PAD),
    .Pads = MtlPchSPch0Community3Group4Pads
  },
  {
    // Group: vGPIO_4
    .Name = "vGPIO_4",
    .GpioPadGroup = GPIOV2_MTL_PCH_S_GROUP_VGPIO_4,
    .RegisterOffsets = { R_GPIOV2_MTL_PCH_S_PCR_VGPIO_4_PAD_OWN, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_4_PADCFGLOCK, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_4_PADCFGLOCKTX, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_4_HOSTSW_OWN, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_4_GPI_IS, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_4_GPI_IE, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_4_GPI_GPE_STS, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_4_GPI_GPE_EN, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_4_SMI_STS, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_4_SMI_EN, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_4_NMI_STS, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_4_NMI_EN, R_GPIOV2_MTL_PCH_S_PCR_VGPIO_4_PAD_CFG_DW0 },
    .PadsNum = sizeof (MtlPchSPch0Community3Group5Pads) / sizeof (GPIOV2_PAD),
    .Pads = MtlPchSPch0Community3Group5Pads
  }
};

//
// Pads for Community 4, Group GPP_S (0)
//
GPIOV2_PAD MtlPchSPch0Community4Group0Pads[] = {
  GPIOV2_MTL_PCH_S_GPP_S_0,
  GPIOV2_MTL_PCH_S_GPP_S_1,
  GPIOV2_MTL_PCH_S_GPP_S_2,
  GPIOV2_MTL_PCH_S_GPP_S_3,
  GPIOV2_MTL_PCH_S_GPP_S_4,
  GPIOV2_MTL_PCH_S_GPP_S_5,
  GPIOV2_MTL_PCH_S_GPP_S_6,
  GPIOV2_MTL_PCH_S_GPP_S_7
};

//
// Pads for Community 4, Group GPP_E (1)
//
GPIOV2_PAD MtlPchSPch0Community4Group1Pads[] = {
  GPIOV2_MTL_PCH_S_GPP_E_0,
  GPIOV2_MTL_PCH_S_GPP_E_1,
  GPIOV2_MTL_PCH_S_GPP_E_2,
  GPIOV2_MTL_PCH_S_GPP_E_3,
  GPIOV2_MTL_PCH_S_GPP_E_4,
  GPIOV2_MTL_PCH_S_GPP_E_5,
  GPIOV2_MTL_PCH_S_GPP_E_6,
  GPIOV2_MTL_PCH_S_GPP_E_7,
  GPIOV2_MTL_PCH_S_GPP_E_8,
  GPIOV2_MTL_PCH_S_GPP_E_9,
  GPIOV2_MTL_PCH_S_GPP_E_10,
  GPIOV2_MTL_PCH_S_GPP_E_11,
  GPIOV2_MTL_PCH_S_GPP_E_12,
  GPIOV2_MTL_PCH_S_GPP_E_13,
  GPIOV2_MTL_PCH_S_GPP_E_14,
  GPIOV2_MTL_PCH_S_GPP_E_15,
  GPIOV2_MTL_PCH_S_GPP_E_16,
  GPIOV2_MTL_PCH_S_GPP_E_17,
  GPIOV2_MTL_PCH_S_GPP_E_18,
  GPIOV2_MTL_PCH_S_GPP_E_19,
  GPIOV2_MTL_PCH_S_GPP_E_20,
  GPIOV2_MTL_PCH_S_GPP_E_21,
  GPIOV2_MTL_PCH_S_SPI1_THC0_CLK_LOOPBK
};

//
// Pads for Community 4, Group GPP_K (2)
//
GPIOV2_PAD MtlPchSPch0Community4Group2Pads[] = {
  GPIOV2_MTL_PCH_S_GPP_K_0,
  GPIOV2_MTL_PCH_S_GPP_K_1,
  GPIOV2_MTL_PCH_S_GPP_K_2,
  GPIOV2_MTL_PCH_S_GPP_K_3,
  GPIOV2_MTL_PCH_S_GPP_K_4,
  GPIOV2_MTL_PCH_S_GPP_K_5,
  GPIOV2_MTL_PCH_S_GPP_K_6,
  GPIOV2_MTL_PCH_S_GPP_K_7,
  GPIOV2_MTL_PCH_S_GPP_K_8,
  GPIOV2_MTL_PCH_S_GPP_K_9,
  GPIOV2_MTL_PCH_S_GPP_K_10,
  GPIOV2_MTL_PCH_S_MISC_SPARE,
  GPIOV2_MTL_PCH_S_SYS_RESETB,
  GPIOV2_MTL_PCH_S_MLK_RSTB
};

//
// Pads for Community 4, Group GPP_F (3)
//
GPIOV2_PAD MtlPchSPch0Community4Group3Pads[] = {
  GPIOV2_MTL_PCH_S_GPP_F_0,
  GPIOV2_MTL_PCH_S_GPP_F_1,
  GPIOV2_MTL_PCH_S_GPP_F_2,
  GPIOV2_MTL_PCH_S_GPP_F_3,
  GPIOV2_MTL_PCH_S_GPP_F_4,
  GPIOV2_MTL_PCH_S_GPP_F_5,
  GPIOV2_MTL_PCH_S_GPP_F_6,
  GPIOV2_MTL_PCH_S_GPP_F_7,
  GPIOV2_MTL_PCH_S_GPP_F_8,
  GPIOV2_MTL_PCH_S_GPP_F_9,
  GPIOV2_MTL_PCH_S_GPP_F_10,
  GPIOV2_MTL_PCH_S_GPP_F_11,
  GPIOV2_MTL_PCH_S_GPP_F_12,
  GPIOV2_MTL_PCH_S_GPP_F_13,
  GPIOV2_MTL_PCH_S_GPP_F_14,
  GPIOV2_MTL_PCH_S_GPP_F_15,
  GPIOV2_MTL_PCH_S_GPP_F_16,
  GPIOV2_MTL_PCH_S_GPP_F_17,
  GPIOV2_MTL_PCH_S_GPP_F_18,
  GPIOV2_MTL_PCH_S_GPP_F_19,
  GPIOV2_MTL_PCH_S_GPP_F_20,
  GPIOV2_MTL_PCH_S_GPP_F_21,
  GPIOV2_MTL_PCH_S_GPP_F_22,
  GPIOV2_MTL_PCH_S_GPP_F_23
};

//
// Groups for Community 4
//
GPIOV2_GROUP MtlPchSPch0Community4Groups[] = {
  {
    // Group: GPP_S
    .Name = "GPP_S",
    .GpioPadGroup = GPIOV2_MTL_PCH_S_GROUP_S,
    .GroupToGpeMapping = { V_GPIOV2_MTL_PCH_S_PMC_PWRM_GPIO_CFG_GPP_S, V_GPIOV2_MTL_PCH_S_PCR_MISCCFG_GPE0_GPP_S },
    .RegisterOffsets = { R_GPIOV2_MTL_PCH_S_PCR_GPP_S_PAD_OWN, R_GPIOV2_MTL_PCH_S_PCR_GPP_S_PADCFGLOCK, R_GPIOV2_MTL_PCH_S_PCR_GPP_S_PADCFGLOCKTX, R_GPIOV2_MTL_PCH_S_PCR_GPP_S_HOSTSW_OWN, R_GPIOV2_MTL_PCH_S_PCR_GPP_S_GPI_IS, R_GPIOV2_MTL_PCH_S_PCR_GPP_S_GPI_IE, R_GPIOV2_MTL_PCH_S_PCR_GPP_S_GPI_GPE_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_S_GPI_GPE_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_S_SMI_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_S_SMI_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_S_NMI_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_S_NMI_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_S_PAD_CFG_DW0 },
    .PadsNum = sizeof (MtlPchSPch0Community4Group0Pads) / sizeof (GPIOV2_PAD),
    .Pads = MtlPchSPch0Community4Group0Pads
  },
  {
    // Group: GPP_E
    .Name = "GPP_E",
    .GpioPadGroup = GPIOV2_MTL_PCH_S_GROUP_E,
    .GroupToGpeMapping = { V_GPIOV2_MTL_PCH_S_PMC_PWRM_GPIO_CFG_GPP_E, V_GPIOV2_MTL_PCH_S_PCR_MISCCFG_GPE0_GPP_E },
    .RegisterOffsets = { R_GPIOV2_MTL_PCH_S_PCR_GPP_E_PAD_OWN, R_GPIOV2_MTL_PCH_S_PCR_GPP_E_PADCFGLOCK, R_GPIOV2_MTL_PCH_S_PCR_GPP_E_PADCFGLOCKTX, R_GPIOV2_MTL_PCH_S_PCR_GPP_E_HOSTSW_OWN, R_GPIOV2_MTL_PCH_S_PCR_GPP_E_GPI_IS, R_GPIOV2_MTL_PCH_S_PCR_GPP_E_GPI_IE, R_GPIOV2_MTL_PCH_S_PCR_GPP_E_GPI_GPE_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_E_GPI_GPE_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_E_SMI_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_E_SMI_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_E_NMI_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_E_NMI_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_E_PAD_CFG_DW0 },
    .PadsNum = sizeof (MtlPchSPch0Community4Group1Pads) / sizeof (GPIOV2_PAD),
    .Pads = MtlPchSPch0Community4Group1Pads
  },
  {
    // Group: GPP_K
    .Name = "GPP_K",
    .GpioPadGroup = GPIOV2_MTL_PCH_S_GROUP_K,
    .GroupToGpeMapping = { V_GPIOV2_MTL_PCH_S_PMC_PWRM_GPIO_CFG_GPP_K, V_GPIOV2_MTL_PCH_S_PCR_MISCCFG_GPE0_GPP_K },
    .RegisterOffsets = { R_GPIOV2_MTL_PCH_S_PCR_GPP_K_PAD_OWN, R_GPIOV2_MTL_PCH_S_PCR_GPP_K_PADCFGLOCK, R_GPIOV2_MTL_PCH_S_PCR_GPP_K_PADCFGLOCKTX, R_GPIOV2_MTL_PCH_S_PCR_GPP_K_HOSTSW_OWN, R_GPIOV2_MTL_PCH_S_PCR_GPP_K_GPI_IS, R_GPIOV2_MTL_PCH_S_PCR_GPP_K_GPI_IE, R_GPIOV2_MTL_PCH_S_PCR_GPP_K_GPI_GPE_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_K_GPI_GPE_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_K_SMI_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_K_SMI_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_K_NMI_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_K_NMI_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_K_PAD_CFG_DW0 },
    .PadsNum = sizeof (MtlPchSPch0Community4Group2Pads) / sizeof (GPIOV2_PAD),
    .Pads = MtlPchSPch0Community4Group2Pads
  },
  {
    // Group: GPP_F
    .Name = "GPP_F",
    .GpioPadGroup = GPIOV2_MTL_PCH_S_GROUP_F,
    .GroupToGpeMapping = { V_GPIOV2_MTL_PCH_S_PMC_PWRM_GPIO_CFG_GPP_F, V_GPIOV2_MTL_PCH_S_PCR_MISCCFG_GPE0_GPP_F },
    .RegisterOffsets = { R_GPIOV2_MTL_PCH_S_PCR_GPP_F_PAD_OWN, R_GPIOV2_MTL_PCH_S_PCR_GPP_F_PADCFGLOCK, R_GPIOV2_MTL_PCH_S_PCR_GPP_F_PADCFGLOCKTX, R_GPIOV2_MTL_PCH_S_PCR_GPP_F_HOSTSW_OWN, R_GPIOV2_MTL_PCH_S_PCR_GPP_F_GPI_IS, R_GPIOV2_MTL_PCH_S_PCR_GPP_F_GPI_IE, R_GPIOV2_MTL_PCH_S_PCR_GPP_F_GPI_GPE_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_F_GPI_GPE_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_F_SMI_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_F_SMI_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_F_NMI_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_F_NMI_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_F_PAD_CFG_DW0 },
    .PadsNum = sizeof (MtlPchSPch0Community4Group3Pads) / sizeof (GPIOV2_PAD),
    .Pads = MtlPchSPch0Community4Group3Pads
  }
};

//
// Pads for Community 5, Group GPP_I (0)
//
GPIOV2_PAD MtlPchSPch0Community5Group0Pads[] = {
  GPIOV2_MTL_PCH_S_GPP_I_0,
  GPIOV2_MTL_PCH_S_GPP_I_1,
  GPIOV2_MTL_PCH_S_GPP_I_2,
  GPIOV2_MTL_PCH_S_GPP_I_3,
  GPIOV2_MTL_PCH_S_GPP_I_4,
  GPIOV2_MTL_PCH_S_GPP_I_5,
  GPIOV2_MTL_PCH_S_GPP_I_6,
  GPIOV2_MTL_PCH_S_GPP_I_7,
  GPIOV2_MTL_PCH_S_GPP_I_8,
  GPIOV2_MTL_PCH_S_GPP_I_9,
  GPIOV2_MTL_PCH_S_GPP_I_10,
  GPIOV2_MTL_PCH_S_GPP_I_11,
  GPIOV2_MTL_PCH_S_GPP_I_12,
  GPIOV2_MTL_PCH_S_GPP_I_13,
  GPIOV2_MTL_PCH_S_GPP_I_14,
  GPIOV2_MTL_PCH_S_GPP_I_15,
  GPIOV2_MTL_PCH_S_GPP_I_16,
  GPIOV2_MTL_PCH_S_GSPI0_CLK_LOOPBK,
  GPIOV2_MTL_PCH_S_GSPI1_CLK_LOOPBK,
  GPIOV2_MTL_PCH_S_ISH_I3C0_CLK_LOOPBK,
  GPIOV2_MTL_PCH_S_I3C0_CLK_LOOPBK
};

//
// Pads for Community 5, Group JTAG_CPU (1)
//
GPIOV2_PAD MtlPchSPch0Community5Group1Pads[] = {
  GPIOV2_MTL_PCH_S_JTAG_TDO,
  GPIOV2_MTL_PCH_S_JTAGX,
  GPIOV2_MTL_PCH_S_PRDYB,
  GPIOV2_MTL_PCH_S_PREQB,
  GPIOV2_MTL_PCH_S_JTAG_TDI,
  GPIOV2_MTL_PCH_S_JTAG_TMS,
  GPIOV2_MTL_PCH_S_JTAG_TCK,
  GPIOV2_MTL_PCH_S_DBG_PMODE,
  GPIOV2_MTL_PCH_S_CPU_TRSTB,
  GPIOV2_MTL_PCH_S_CPUPWRGD,
  GPIOV2_MTL_PCH_S_PM_SPARE0,
  GPIOV2_MTL_PCH_S_PM_SPARE1,
  GPIOV2_MTL_PCH_S_CRASHLOG_TRIG_N,
  GPIOV2_MTL_PCH_S_TRIGGER_IN,
  GPIOV2_MTL_PCH_S_TRIGGER_OUT,
  GPIOV2_MTL_PCH_S_FBRK_OUT_N
};

//
// Groups for Community 5
//
GPIOV2_GROUP MtlPchSPch0Community5Groups[] = {
  {
    // Group: GPP_I
    .Name = "GPP_I",
    .GpioPadGroup = GPIOV2_MTL_PCH_S_GROUP_I,
    .GroupToGpeMapping = { V_GPIOV2_MTL_PCH_S_PMC_PWRM_GPIO_CFG_GPP_I, V_GPIOV2_MTL_PCH_S_PCR_MISCCFG_GPE0_GPP_I },
    .RegisterOffsets = { R_GPIOV2_MTL_PCH_S_PCR_GPP_I_PAD_OWN, R_GPIOV2_MTL_PCH_S_PCR_GPP_I_PADCFGLOCK, R_GPIOV2_MTL_PCH_S_PCR_GPP_I_PADCFGLOCKTX, R_GPIOV2_MTL_PCH_S_PCR_GPP_I_HOSTSW_OWN, R_GPIOV2_MTL_PCH_S_PCR_GPP_I_GPI_IS, R_GPIOV2_MTL_PCH_S_PCR_GPP_I_GPI_IE, R_GPIOV2_MTL_PCH_S_PCR_GPP_I_GPI_GPE_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_I_GPI_GPE_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_I_SMI_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_I_SMI_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_I_NMI_STS, R_GPIOV2_MTL_PCH_S_PCR_GPP_I_NMI_EN, R_GPIOV2_MTL_PCH_S_PCR_GPP_I_PAD_CFG_DW0 },
    .PadsNum = sizeof (MtlPchSPch0Community5Group0Pads) / sizeof (GPIOV2_PAD),
    .Pads = MtlPchSPch0Community5Group0Pads
  },
  {
    // Group: JTAG_CPU
    .Name = "JTAG_CPU",
    .GpioPadGroup = GPIOV2_MTL_PCH_S_GROUP_JTAG_CPU,
    .RegisterOffsets = { R_GPIOV2_MTL_PCH_S_PCR_JTAG_CPU_PAD_OWN, R_GPIOV2_MTL_PCH_S_PCR_JTAG_CPU_PADCFGLOCK, R_GPIOV2_MTL_PCH_S_PCR_JTAG_CPU_PADCFGLOCKTX, R_GPIOV2_MTL_PCH_S_PCR_JTAG_CPU_HOSTSW_OWN, R_GPIOV2_MTL_PCH_S_PCR_JTAG_CPU_GPI_IS, R_GPIOV2_MTL_PCH_S_PCR_JTAG_CPU_GPI_IE, R_GPIOV2_MTL_PCH_S_PCR_JTAG_CPU_GPI_GPE_STS, R_GPIOV2_MTL_PCH_S_PCR_JTAG_CPU_GPI_GPE_EN, R_GPIOV2_MTL_PCH_S_PCR_JTAG_CPU_SMI_STS, R_GPIOV2_MTL_PCH_S_PCR_JTAG_CPU_SMI_EN, R_GPIOV2_MTL_PCH_S_PCR_JTAG_CPU_NMI_STS, R_GPIOV2_MTL_PCH_S_PCR_JTAG_CPU_NMI_EN, R_GPIOV2_MTL_PCH_S_PCR_JTAG_CPU_PAD_CFG_DW0 },
    .PadsNum = sizeof (MtlPchSPch0Community5Group1Pads) / sizeof (GPIOV2_PAD),
    .Pads = MtlPchSPch0Community5Group1Pads
  }
};

//
// Communities structure
//
GPIOV2_COMMUNITY MtlPchSCommunities[] = {
  {
    // Community 0 groups info
    .RegisterOffsets = { R_GPIOV2_MTL_PCH_S_PCR_MISCCFG, R_GPIOV2_MTL_PCH_S_PCR_G0_RCP_DW0 },
    .GroupsNum = sizeof (MtlPchSPch0Community0Groups) / sizeof (GPIOV2_GROUP),
    .Groups = MtlPchSPch0Community0Groups
  },
  {
    // Community 1 groups info
    .RegisterOffsets = { R_GPIOV2_MTL_PCH_S_PCR_MISCCFG, R_GPIOV2_MTL_PCH_S_PCR_G0_RCP_DW0 },
    .GroupsNum = sizeof (MtlPchSPch0Community1Groups) / sizeof (GPIOV2_GROUP),
    .Groups = MtlPchSPch0Community1Groups
  },
  {
    // Community 2 groups info
    .RegisterOffsets = { R_GPIOV2_MTL_PCH_S_PCR_MISCCFG, R_GPIOV2_MTL_PCH_S_PCR_G0_RCP_DW0 },
    .GroupsNum = sizeof (MtlPchSPch0Community2Groups) / sizeof (GPIOV2_GROUP),
    .Groups = MtlPchSPch0Community2Groups,
    //.IsComDsw = TRUE
  },
  {
    // Community 3 groups info
    .RegisterOffsets = { R_GPIOV2_MTL_PCH_S_PCR_MISCCFG, R_GPIOV2_MTL_PCH_S_PCR_G0_RCP_DW0 },
    .GroupsNum = sizeof (MtlPchSPch0Community3Groups) / sizeof (GPIOV2_GROUP),
    .Groups = MtlPchSPch0Community3Groups
  },
  {
    // Community 4 groups info
    .RegisterOffsets = { R_GPIOV2_MTL_PCH_S_PCR_MISCCFG, R_GPIOV2_MTL_PCH_S_PCR_G0_RCP_DW0 },
    .GroupsNum = sizeof (MtlPchSPch0Community4Groups) / sizeof (GPIOV2_GROUP),
    .Groups = MtlPchSPch0Community4Groups
  },
  {
    // Community 5 groups info
    .RegisterOffsets = { R_GPIOV2_MTL_PCH_S_PCR_MISCCFG, R_GPIOV2_MTL_PCH_S_PCR_G0_RCP_DW0 },
    .GroupsNum = sizeof (MtlPchSPch0Community5Groups) / sizeof (GPIOV2_GROUP),
    .Groups = MtlPchSPch0Community5Groups
  }
};

/**
  This procedure retrieves number of communities for PCH with index 'PchIndex'

  @param[in] PchIndex             MTL SOC/PCH index

  @retval                         Number of communities on requested PCH
**/
UINT32
MtlPchGpioGetCommunitiesNum (
  IN UINT32 PchIndex
  )
{
  return sizeof (MtlPchSCommunities) / sizeof (GPIOV2_COMMUNITY);         // MTL PCH S
}

/**
  This procedure retrieves pointer to array of communities for PCH with index 'PchIndex'

  @param[in] PchIndex             MTL SOC/PCH index

  @retval                         pointer to array of communities on requested PCH
**/
GPIOV2_COMMUNITY*
MtlPchGpioGetCommunities (
  IN UINT32 PchIndex
  )
{
  return MtlPchSCommunities;         // MTL PCH S
}

/**
  This procedure retrieves pointer to community for PCH with community index.
  @param[in] CommunityIndex       Community Index
  @retval                         Pointer to community on requested Index
**/
GPIOV2_COMMUNITY*
MtlPchGpioGetCommunity (
    IN UINT32 CommunityIndex
  )
{
  return &(MtlPchSCommunities[CommunityIndex]);       // Mtl PCH S
}

/**
  This procedure retrieves register offset for given Gpio Pad
  @param[in]  GpioPad             Gpio Pad. Please refer to GpioPinsYYY.h - where YYY name of the platform (eg. MTL, EBG, ...)
  @param[in]  Register            Register for which user want to retrieve offset. Please refer to GpioV2Pad.h
  @param[out] RegisterOffset      Pointer to a buffer for register offset
  @retval EFI_SUCCESS             The function completed successfully
  @retval EFI_INVALID_PARAMETER   Invalid group or pad number
**/
EFI_STATUS
MtlPchGpioGetRegOffset (
  IN  GPIOV2_PAD          GpioPad,
  IN  GPIOV2_REGISTER     Register,
  OUT UINT32              *RegisterOffset
  )
{
  GPIOV2_COMMUNITY   *Community;
  UINT32             CommunityIndex;
  UINT32             GroupIndex;
  UINT32             PadIndex;

  CommunityIndex = GPIOV2_PAD_GET_COMMUNITY_INDEX (GpioPad);
  GroupIndex     = GPIOV2_PAD_GET_GROUP_INDEX (GpioPad);
  PadIndex       = GPIOV2_PAD_GET_PAD_INDEX (GpioPad);

  Community = MtlPchGpioGetCommunity (CommunityIndex);

  switch (Register) {
    case GpioV2PadOwnReg:
      *RegisterOffset = Community->Groups[GroupIndex].RegisterOffsets.PadOwn + (PadIndex / 8) * 0x04;
      break;
    case GpioV2PadHostOwnReg:
      *RegisterOffset = Community->Groups[GroupIndex].RegisterOffsets.HostOwn;
      break;
    case GpioV2Dw0Reg:
      *RegisterOffset = Community->Groups[GroupIndex].RegisterOffsets.Dw0 + PadIndex * 0x10;
      break;
    case GpioV2Dw1Reg:
      *RegisterOffset = Community->Groups[GroupIndex].RegisterOffsets.Dw0 + 0x04 + PadIndex * 0x10;
      break;
    case GpioV2Dw2Reg:
      *RegisterOffset = Community->Groups[GroupIndex].RegisterOffsets.Dw0 + 0x08 + PadIndex * 0x10;
      break;
    default:
      return EFI_INVALID_PARAMETER;
  }
  return EFI_SUCCESS;
}

EFI_STATUS
MtlPchInstallCommunityAccess (
  OUT P2SB_SIDEBAND_REGISTER_ACCESS   *CommunityAccess
)
{
  EFI_STATUS                          Status;
  UINT32                              CommunityIndex;
  P2SB_CONTROLLER                     P2SbController;

  CommunityAccess            = (P2SB_SIDEBAND_REGISTER_ACCESS *) AllocateZeroPool (sizeof (P2SB_SIDEBAND_REGISTER_ACCESS) * MtlPchGpioGetCommunitiesNum(0));
  if (CommunityAccess == NULL) {
    DEBUG ((DEBUG_ERROR, "[GPIOV2]: Allocating memory for CommunityAccess failed\n"));
    ASSERT (FALSE);
    return EFI_OUT_OF_RESOURCES;
  }

  Status = MtlPchGetP2SbController (&P2SbController);
  if (Status != EFI_SUCCESS) {
    DEBUG ((DEBUG_ERROR, "MtlPchGetP2SbController failed: %r\n", Status));
    ASSERT (FALSE);
  }

  for (CommunityIndex = 0; CommunityIndex < MtlPchGpioGetCommunitiesNum(0); CommunityIndex++) {
    BuildP2SbSidebandAccess (
      &P2SbController,
      (P2SB_PID)(MTL_PCH_PID_GPCOM0 - CommunityIndex),
      0,
      P2SbPrivateConfig,
      P2SbMsgAccess,
      TRUE,
      &(CommunityAccess[CommunityIndex])
      );
  }
  (VOID) PcdSet32S (PcdP2sb0Ptr, (UINT32)(UINTN)&(CommunityAccess[0]));
  (VOID) PcdSet32S (PcdP2sb1Ptr, (UINT32)(UINTN)&(CommunityAccess[1]));
  (VOID) PcdSet32S (PcdP2sb2Ptr, (UINT32)(UINTN)&(CommunityAccess[2]));
  (VOID) PcdSet32S (PcdP2sb3Ptr, (UINT32)(UINTN)&(CommunityAccess[3]));
  (VOID) PcdSet32S (PcdP2sb4Ptr, (UINT32)(UINTN)&(CommunityAccess[4]));
  (VOID) PcdSet32S (PcdP2sb5Ptr, (UINT32)(UINTN)&(CommunityAccess[5]));
  return EFI_SUCCESS;
}

/**
  This procedure retrieves number of groups in each community for PCH with index 'PchIndex'

  @param[in] CommunityIndex             MTL PCH CommunityIndex
  @param[in] GroupIndex                 MTL PCH GroupIndex

  @retval                         Number of groups on requested PCH
**/
GPIOV2_GROUP
MtlPchGpioGetGroups (
  IN UINT32 CommunityIndex,
  IN UINT32 GroupIndex
  )
{
  if (CommunityIndex == 0) {
    return (MtlPchSPch0Community0Groups[GroupIndex]);
  }
  else if (CommunityIndex == 1) {
    return (MtlPchSPch0Community1Groups[GroupIndex]);
  }
  else if (CommunityIndex == 2) {
    return (MtlPchSPch0Community2Groups[GroupIndex]);
  }
  else if (CommunityIndex == 3) {
    return (MtlPchSPch0Community3Groups[GroupIndex]);
  }
  else if (CommunityIndex == 4) {
    return (MtlPchSPch0Community4Groups[GroupIndex]);
  } else {
    return (MtlPchSPch0Community5Groups[GroupIndex]);
  }
}